W78IRD2 Datasheet, PDF (33/76 Pages) Winbond – 8-BIT MICROCONTROLLER

W78IRD2
9. PROGRAMMABLE TIMERS/COUNTERS
The W78IRD2 has three 16-bit programmable timer/counters.
Time-Base Selection
The W78IRD2 offers two speeds for the timer. The timers can count at 1/12 of the clock, the same
speed they have in the standard 8051 family. Alternatively, the timers can count at 1/6 of the clock,
called turbo mode. The speed is controlled by bits T0M, T1M and T2M bits in CKCON. The default
value is zero, which selects 1/12 of the clock. These 3 bits, T0M, T1M and T2M, have no effect if
option bit 3 is set to 1 to select 12 clocks / machine cycle.
9.1 Timer 0 and Timer 1
Timers 0 and 1 each have a 16-bit timer/counter which consists of two eight-bit registers: Timer 0
consists of TH0 (8 MSB) and TL0 (8 LSB), and Timer 1 consists of TH1 and TL1.
These timers/counters can be configured to operate either as timers, machine–cycle counters or
counters based on external inputs. The "Timer" or "Counter" function itself is selected by the
corresponding " C/T " bit in the TMOD register: bit 2 for Timer 0 and bit 6 for Timer 1. In addition, each
timer/counter can operate in one of four possible modes, which are selected by bits M0 and M1 in
TMOD.
The rest of this section explains the time-base for the timers and then introduces each mode.
Mode 0
In mode 0, the timer/counter is a 13-bit counter whose eight MSB are in THx and five LSB are the five
lower bits in TLx. The upper three bits in TLx are ignored. Because THx and TLx are read separately,
the timer/counter acts like an eight-bit counter with a five-bit, divide-by-32 pre-scale.
Counting is enabled only when TRx is set and either GATE = 0 or INTx = 1. What the timer/counter
counts depends on C/T . When C/T is set to 0, the timer/counter counts the negative edges of the
clock according to the time-base selected by bits TxM in CKCON. When C/T is set to 1, it counts
falling edges on T0 (P3.4, for Timer 0) or T1 (P3.5, for Timer 1). When the 13-bit counter reaches
1FFFh, the next count rolls over the timer/counter to 0000h, and the timer overflow flag TFx (in TCON)
is set. If enabled, an interrupt occurs.
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Publication Release Date: October 2, 2006
Revision A7