M0518 Datasheet, PDF (9/72 Pages) List of Unclassifed Manufacturers – 36/68 Kbytes flash, 8K bytes SRAM

NuMicro M0518 Series Datasheet
– Supports independent mode for BPWM output/Capture input channel
– Supports 12-bit pre-scalar from 1 to 4096
– Supports 16-bit resolution BPWM counter
 Up, down and up/down counter operation type
– Supports mask function and tri-state enable for each BPWM pin
– Supports interrupt on the following events:
 BPWM counter match zero, period value or compared value
– Supports trigger ADC on the following events:
 BPWM counter match zero, period value or compared value
– Supports up to 12 capture input channels with 16-bit resolution
– Supports rising edges, falling edges or both edges capture condition
– Supports input rising edges, falling edges or both edges capture interrupt
– Supports rising edges, falling edges or both edges capture with counter reload option
 PWM/Capture
– Supports maximum clock frequency up to 100MHz
– Supports up to two PWM modules, each module provides three 16-bit timers and 6 output
channels
– Supports independent mode for PWM output/Capture input channel
– Supports complementary mode for 3 complementary paired PWM output channel
 Dead-time insertion with 12-bit resolution
 Two compared values during one period
– Supports 12-bit pre-scalar from 1 to 4096
– Supports 16-bit resolution PWM counter
 Up, down and up/down counter operation type
– Supports mask function and tri-state enable for each PWM pin
– Supports brake function
 Brake source from pin and system safety events (clock failed, Brown-out detection and
CPU lockup)
 Noise filter for brake source from pin
 Edge detect brake source to control brake state until brake interrupt cleared
 Level detect brake source to auto recover function after brake condition removed
– Supports interrupt on the following events:
 PWM counter match zero, period value or compared value
 Brake condition happened
– Supports trigger ADC on the following events:
 PWM counter match zero, period value or compared value
– Supports up to 12 capture input channels with 16-bit resolution
– Supports rising edges, falling edges or both edges capture condition
– Supports input rising edges, falling edges or both edges capture interrupt
– Supports rising edges, falling edges or both edges capture with counter reload option
 UART
– Up to six UART controllers
– UART0 and UART1 ports with flow control (TXD, RXD, nCTS and nRTS)
– UART0, UART1 and UART2 with 16-byte FIFO for standard device
– Supports IrDA (SIR) and LIN function
– Supports RS-485 9-bit mode and direction control
– Supports auto baud-rate generator
 SPI
– One set of SPI controller
– Supports SPI Master/Slave mode
– Full duplex synchronous serial data transfer
– Variable length of transfer data from 8 to 32 bits
– MSB or LSB first data transfer
– Rx and Tx on both rising or falling edge of serial clock independently
– Supports Byte Suspend mode in 32-bit transmission
– Supports three wire, no slave select signal, bi-direction interface
Feb 08, 2017
Page 9 of 72
Revision 1.01