M0518 Datasheet, PDF (35/72 Pages) List of Unclassifed Manufacturers – 36/68 Kbytes flash, 8K bytes SRAM

NuMicro M0518 Series Datasheet
6.3 Clock Controller
6.3.1 Overview
The clock controller generates the clocks for the whole chip, including system clocks and all
peripheral clocks. The clock controller also implements the power control function with the
individually clock ON/OFF control, clock source selection and clock divider. The chip enters
Power-down mode when Cortex™-M0 core executes the WFI instruction only if the
PWR_DOWN_EN (PWRCON[7]) bit and PD_WAIT_CPU (PWRCON[8]) bit are both set to 1.
After that, chip enters Power-down mode and wait for wake-up interrupt source triggered to leave
Power-down mode. In the Power-down mode, the clock controller turns off the 4~24 MHz external
high speed crystal oscillator and 22.1184 MHz internal high speed RC oscillator to reduce the
overall system power consumption. The following figures show the clock generator and the
overview of the clock source control.
The clock generator consists of 5 clock sources as listed below:
 4~24 MHz external high speed crystal oscillator (HXT)
 Programmable PLL output clock frequency(PLL FOUT),PLL source can be from
external 4~24 MHz external high speed crystal oscillator (HXT) or 22.1184 MHz
internal high speed RC oscillator (HIRC))
 22.1184 MHz internal high speed RC oscillator (HIRC)
 10 kHz internal low speed RC oscillator (LIRC)
XT1_OUT
XT1_IN
XTL12M_EN (PWRCON[0])
HXT
4~24 MHz
HXT
OSC22M_EN (PWRCON[2])
22.1184 MHz
HIRC
OSC10K_EN (PWRCON[3])
PLL_SRC (PLLCON[19])
0
PLL
1
PLL FOUT
HIRC
10 kHz
LIRC
LIRC
Legend:
HXT = 4~24 MHz external high speed crystal oscillator
HIRC = 22.1184 MHz internal high speed RC oscillator
LIRC = 10 kHz internal low speed RC oscillator
Figure 6-3 Clock Generator Block Diagram
Feb 08, 2017
Page 35 of 72
Revision 1.01