M0518 Datasheet, PDF (29/72 Pages) List of Unclassifed Manufacturers – 36/68 Kbytes flash, 8K bytes SRAM

NuMicro M0518 Series Datasheet
6.2.5 System Timer (SysTick)
The Cortex™-M0 includes an integrated system timer, SysTick, which provides a simple, 24-bit
clear-on-write, decrementing, wrap-on-zero counter with a flexible control mechanism. The
counter can be used as a Real Time Operating System (RTOS) tick timer or as a simple counter.
When system timer is enabled, it will count down from the value in the SysTick Current Value
Register (SYST_CVR) to 0, and reload (wrap) to the value in the SysTick Reload Value Register
(SYST_RVR) on the next clock cycle, then decrement on subsequent clocks. When the counter
transitions to 0, the COUNTFLAG status bit is set. The COUNTFLAG bit clears on reads.
The SYST_CVR value is unknown on reset. Software should write to the register to clear it to 0
before enabling the feature. This ensures the timer will count from the SYST_RVR value rather
than an arbitrary value when it is enabled.
If the SYST_RVR is 0, the timer will be maintained with a current value of 0 after it is reloaded
with this value. This mechanism can be used to disable the feature independently from the timer
enable bit.
For more detailed information, please refer to the “ARM^® Cortex™-M0 Technical Reference
Manual” and “ARM^® v6-M Architecture Reference Manual”.
Feb 08, 2017
Page 29 of 72
Revision 1.01