M0518 Datasheet, PDF (47/72 Pages) List of Unclassifed Manufacturers – 36/68 Kbytes flash, 8K bytes SRAM

NuMicro M0518 Series Datasheet
6.9 Watchdog Timer (WDT)
6.9.1 Overview
The purpose of Watchdog Timer is to perform a system reset when system runs into an unknown
state. This prevents system from hanging for an infinite period of time. Besides, this Watchdog
Timer supports the function to wake-up system from Idle/Power-down mode.
6.9.2 Features
 18-bit free running up counter for Watchdog Timer time-out interval.
 Selectable time-out interval (2⁴ ~ 2¹⁸) WDT_CLK cycle and the time-out interval period
is 104 ms ~ 26.3168 s if WDT_CLK = 10 kHz.
 System kept in reset state for a period of (1 / WDT_CLK) * 63
 Supports Watchdog Timer reset delay period
- Selectable it includes (1026、130、18 or 3) * WDT_CLK reset delay period.
 Supports to force Watchdog Timer enabled after chip powered on or reset while
CWDTEN (CONFIG0[31] Watchdog Enable) bit is set to 0.
 Supports Watchdog Timer time-out wake-up function only if WDT clock source is
selected as 10 kHz
Feb 08, 2017
Page 47 of 72
Revision 1.01