M0518 Datasheet, PDF (43/72 Pages) List of Unclassifed Manufacturers – 36/68 Kbytes flash, 8K bytes SRAM

NuMicro M0518 Series Datasheet
6.7 PWM Generator and Capture Timer (PWM)
6.7.1 Overview
The M0518 provides two PWM generators － PWM0 and PWM1. Each PWM supports 6 channels
of PWM output or input capture. There is a 12-bit prescaler to support flexible clock to the 16-bit
PWM counter with 16-bit comparator. The PWM counter supports up, down and up-down counter
types. PWM uses the comparator compared with counter to generate events. These events are
used to generate PWM pulse, interrupt and trigger signal for ADC to start conversion.
The PWM generator supports two standard PWM output modes: Independent mode and
Complementary mode, which have difference architecture. In Complementary mode, there are
two comparators to generate various PWM pulse with 12-bit dead-time generator. For PWM
output control unit, it supports polarity output, independent pin mask, tri-state output enable and
brake functions.
The PWM generator also supports input capture function to latch PWM counter value to the
corresponding register when input channel has a rising transition, falling transition or both
transition is happened.
6.7.2 Features
6.7.2.1 PWM function features
 Supports maximum clock frequency up to100 MHz
 Supports up to two PWM modules, each module provides 6 output channels
 Supports independent mode for PWM output/Capture input channel
 Supports complementary mode for 3 complementary paired PWM output channel
 Dead-time insertion with 12-bit resolution
 Two compared values during one period
 Supports 12-bit pre-scalar from 1 to 4096
 Supports 16-bit resolution PWM counter, each module provides 3 PWM counters
 Up, down and up/down counter operation type
 Supports mask function and tri-state enable for each PWM pin
 Supports brake function
 Brake source from pin and system safety events (clock failed, Brown-out
detection and CPU lockup)
 Noise filter for brake source from pin
 Edge detect brake source to control brake state until brake interrupt cleared
 Level detect brake source to auto recover function after brake condition removed
 Supports interrupt on the following events:
 PWM counter match zero, period value or compared value
 Brake condition happened
 Supports trigger ADC on the following events:
 PWM counter match zero, period value or compared value
Feb 08, 2017
Page 43 of 72
Revision 1.01