NUC951ADN Datasheet, PDF (67/590 Pages) Nuvoton Technology Corporation – 32-bit ARM926EJ-S Based Microcontroller

NUC951ADN
32-BIT ARM926EJ-S BASED MCU
7.4.2.3 AHB Bus Address Mapping to SDRAM Bus
Note:
* indicates the signal is not used; ** indicates the signal is fixed at logic 0 and is not used;
The HADDR prefixes have been omitted on the following tables.
MA14 ~ MA0 are the Address pins of the EBI interface;
MA14 and MA13 are also the bank selected signals of SDRAM.
SDRAM Data Bus Width: 32-bit
Total
Type
RxC
R/C
MA14
(BS1)
MA13
(BS0)
MA12
16M
2Mx8 11x9
R
**
11
**
C
**
11
**
16M
1Mx16 11x8
R
**
10
**
C
**
10
**
64M
8Mx8 12x9
R
11
12
11*
C
11
12
11*
64M
4Mx16 12x8
R
11
10
11*
C
11
10
11*
64M
2Mx32 11x8
R
11
10
11*
C
11
10
11*
128M* 16Mx8 12x10
R
11
12
11*
C
11
12
11*
128M 8Mx16 12x9
R
11
12
11*
C
11
12
11*
128M 4Mx32 12x8
R
11
10
11*
C
11
10
11*
256M* 32Mx8 13x10
R
11
12
24
C
11
12
24*
256M* 16Mx16 13x9
R
11
12
24
C
11
12
24*
512M* 64Mx8 13x11
R
11
12
24
C
11
12
24*
512M* 32Mx16 13x10
R
11
12
24
C
11
12
24*
MA11
11*
11*
10*
10*
23
23*
23
23*
23*
23*
23
23*
23
23*
23
23*
23
23*
23
23*
23
27
23
23*
MA10
22
AP
11
AP
22
AP
22
AP
22
AP
22
AP
22
AP
22
AP
22
AP
22
AP
22
AP
22
AP
MA9
21
25*
21
25*
21
25*
21
25*
21
25*
21
25
21
25*
21
25*
21
26
21
26*
21
26
21
26
MA8
20
10
20
10*
20
10
20
24*
20
24*
20
10
20
10
20
10*
20
10
20
10
20
10
20
10
MA7
19
9
19
9
19
9
19
9
19
9
19
9
19
9
19
9
19
9
19
9
19
9
19
9
MA6
18
8
18
8
18
8
18
8
18
8
18
8
18
8
18
8
18
8
18
8
18
8
18
8
MA5
17
7
17
7
17
7
17
7
17
7
17
7
17
7
17
7
17
7
17
7
17
7
17
7
MA4
16
6
16
6
16
6
16
6
16
6
16
6
16
6
16
6
16
6
16
6
16
6
16
6
MA3
15
5
15
5
15
5
15
5
15
5
15
5
15
5
15
5
15
5
15
5
15
5
15
5
MA2
14
4
14
4
14
4
14
4
14
4
14
4
14
4
14
4
14
4
14
4
14
4
14
4
MA1
13
3
13
3
13
3
13
3
13
3
13
3
13
3
13
3
13
3
13
3
13
3
13
3
MA0
12
2
12
2
24
2
12
2
12
2
24
2
24
2
12
2
25
2
25
2
25
2
25
2
Publication Release Date: Sep. 10, 2012
67
Revision: A5