NUC951ADN Datasheet, PDF (47/590 Pages) Nuvoton Technology Corporation – 32-bit ARM926EJ-S Based Microcontroller

NUC951ADN
FOUT
(PLL)
HCLK
IDLE
CLKIDLE
CPUCLK
HCLK
256
clocks
32-BIT ARM926EJ-S BASED MCU
IDLE Period
Case2. IDLE=1, PD=0, MIDLE=1
Power-Down Mode
The mode provides the minimum power consumption. When the system is not working or waiting an
external event, software can write PD bit to turn off all the clocks includes system crystal oscillator and
PLL to let ARM core to enter sleep mode after 256 clock cycles. In this state, all peripherals are also in
sleep mode since the clock source is stopped. This system will exit from this mode when external
interrupts (nIRQ signals) are detected; this chip provides external interrupts, USB device, RTC and
Keypad to wakeup the clock.
256
clocks
65536 clocks
EXTAL
HCLK
PD
CLKIDLE
AHB HCLK
APB PCLK
Case3. IDLE=0, PD=1, MIDLE=0
Publication Release Date: Sep. 10, 2012
47
Revision: A5