NUC951ADN Datasheet, PDF (57/590 Pages) Nuvoton Technology Corporation – 32-bit ARM926EJ-S Based Microcontroller

NUC951ADN
EXTAL15M
INDV[4:0]
FIN
Input Divider
(NR)
PFD
Charge
Pump
32-BIT ARM926EJ-S BASED MCU
PLL
VCO
Output
Divider
(NO) ^FOUT
PLLFOUT
FBDV[8:0]
Feedback
Divider
(NF)
OTDV[1:0]
The formula of output clock of PLL is:
FOUT = FIN  ^NF  ¹
NR NO
FOUT：Output clock of Output Divider
FIN：External clock into the Input Divider
NR：Input divider value (NR = INDV + 2)
NF：Feedback divider value (NF = FBDV + 2)
NO：Output divider value (NO = OTDV)
Example Case:
The input clock frequency of EXTAL15M pin is 15MHz
PLL Output Frequency
PLLCON Reg.
200MHz
0x0000_4F24
166MHz
133MHz
100MHz
0x0000_4124 0x0000_22A2 0x0000_4F64
PLL Output Frequency
PLLCON Reg.
66MHz
0x0000_2B63
169.34MHz
(44.1K*3840)
0x0000_4E25
122.88MHz
(48K*2560)
0x0000_92E7
Publication Release Date: Sep. 10, 2012
57
Revision: A5