NUC951ADN Datasheet, PDF (401/590 Pages) Nuvoton Technology Corporation – 32-bit ARM926EJ-S Based Microcontroller

NUC951ADN
32-BIT ARM926EJ-S BASED MCU
AC-link Control Register (ACTL_ACCON)
Register
ACTL_ACCON
Address
R/W
0xB000_902C R/W
Description
AC-link control register
Reset Value
0x0000_0000
31
30
23
22
15
14
7
6
RESERVED
29
21
13
5
AC_BCLK_P
U_EN
28
27
RESERVED
20
19
RESERVED
12
11
RESERVED
4
3
AC_R_FINI AC_W_FINI
SH
SH
26
18
10
2
AC_W_RES
25
17
9
1
AC_C_RES
24
16
8
0
RESERVED
Bits
[5]
Descriptions
AC_BCLK Pin Pull-high Resister Enable
If AC_BCLK_PU_EN=0, the AC_BCLK pin pull-high resister will be
disabled
AC_BCLK_PU_EN
If AC_BCLK_PU_EN=1, the AC_BCLK pin pull-high resister will be
enabled
[4] AC_R_FINISH
The AC_BCLK_PU_EN bit is read/write.
AC-link Read Data Ready Bit.
When read data indexed by previous frame is shifted into
ACTL_ACIS2, the AC_R_FINISH bit will be set to 1 automatically. After
CPU read out the read data, AC_R_FINISH bit will be cleared to 0.
If AC_R_FINISH=0, read data buffer has been read by CPU
If AC_R_FINISH=1, read data buffer is ready for CPU read
[3] AC_W_FINISH
The AC_R_FINISH bit is read only
AC-link Write Frame Finish Bit.
When writing data to register ACTL_ACOS0, the AC_W_FINISH bit will
be set to 1 automatically. After AC-link interface shift out the register
ACTL_ACOS0, the AC_W_FINISH bit will be cleared to 0.
If AC_W_FINISH=0, AC-link control data out buffer has been shifted
out to codec by CPU and data out buffer is empty.
If AC_W_FINISH=1, AC-link control data out buffer is ready to be
shifted out(After users have wrote data into register
Publication Release Date: Sep. 10, 2012
401
Revision: A5