NUC951ADN Datasheet, PDF (349/590 Pages) Nuvoton Technology Corporation – 32-bit ARM926EJ-S Based Microcontroller

NUC951ADN
32-BIT ARM926EJ-S BASED MCU
function in High-color TFT-LCD with 8 bits data bus mode.
RGB_SHIFT = 0 : hsync will not move
HSYNC _SHIFT = 1 : hsync will left move 1 pclk cycle
HSYNC _SHIFT = 2 : hsync will left move 2 pclk cycle
Hsync signal adjustment for multi-cycles per pixel mode of Sync-
based High-color TFT-LCD
When DEVICE_CTRL[DEVICE] = 110 , DEVICE_CTRL[RGB_SCALE]=3(16M-
color mode) and DEVICE[DBWORD]= 0,
If DEVICE_CTRL[SWAP_YcbCr[1]] = 0, it means that 3 cycles per pixel, so
hsync’s hrs would move three cycles if hrs added or subtracted 1.In order
to adjust hsync signal in pclk unit, RGB_SHIFT shared register aids this
function in High-color TFT-LCD with 8 bits data bus mode.
HSYNC _SHIFT = 0 : hsync will not move
HSYNC _SHIFT = 1 : hsync will left move 1 pclk cycle
HSYNC _SHIFT = 2 : hsync will left move 2 pclk cycle
If DEVICE_CTRL[SWAP_YcbCr[1]] = 1, it means that 4 cycles per pixel, so
hsync’s hrs would move three cycles if hrs added or subtracted 1.In order
to adjust hsync signal in pclk unit, RGB_SHIFT shared register aids this
function in High-color TFT-LCD with 8 bits data bus mode.
HSYNC _SHIFT = 0 : hsync will not move
HSYNC _SHIFT = 1 : hsync will left move 1 pclk cycle
HSYNC _SHIFT = 2 : hsync will left move 2 pclk cycle
HSYNC _SHIFT = 3 : hsync will left move 3 pclk cycle
Publication Release Date: Sep. 10, 2012
349
Revision: A5