MC3410 Datasheet, PDF (43/75 Pages) NXP Semiconductors – 10-Bit high-speed multiplying D/A converter

MC3410 3-Axis Accelerometer
Datasheet
11.2 TILT: STATUS REGISTER
This register contains bits which are set when a motion event is detected. Each event has a
corresponding interrupt enable which can mask any combination of events. The event
detection bits (SHAKED, DROPD, TAPD) remain held until the register is read by the I2C
interface. Note that the orientation bit-fields POLA and BAFR are continuously updated (every
sample) in the TILT: Status Register and are not held. Note that multiple interrupts may be
active at the same time, and so a software routine reading the TILT: Status Register should
account for this. Refer to Figure 20. Package Orientation and Figure 21. Package Axis
Reference.
Addr Name
0x03 TILT
Description
Tilt Status
Register
Bit 7 Bit 6 Bit 5
SHAKED DROPD TAPD
Bit 4
POLA
[2]
Bit 3
POLA
[1]
Bit 2
POLA
[0]
Bit 1
BAFR
[1]
Bit 0
BAFR
[0]
POR R/
Value W
0x00 R
BAFR[1:0]
POLA[2:0]
TAPD
DROPD
SHAKED
Back or Front
00: Unknown condition of front or back
01: Front – Device is in orientation e in Figure 20. Package Orientation.
10: Back – Device is in orientation f in Figure 20. Package Orientation.
11: Reserved
Portrait or Landscape
000: Unknown condition of up, down, left or right
001: Left – Device is in orientation b in Figure 20. Package Orientation.
010: Right – Device is in orientation c in Figure 20. Package Orientation.
011: Reserved
100: Reserved
101: Down – Device is in orientation d in Figure 20. Package Orientation.
110: Up – Device is in orientation a in Figure 20. Package Orientation.
111: Reserved
Tap Detect
0: Tap event not detected
1: Tap event detected
Drop Detect
0: Drop event not detected
1: Drop event detected
Shake Detect
0: Shake event not detected
1: Shake event detected
Table 24. TILT Status Register Settings
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APS-048-0010v2.2
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