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MC3410 Datasheet, PDF (41/75 Pages) NXP Semiconductors – 10-Bit high-speed multiplying D/A converter
MC3410 3-Axis Accelerometer
Datasheet
11.1 REGISTER SUMMARY
Addr Name
Description
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0x00-0x02
0x03 TILT Tilt Status Register
0x04 OPSTAT
0x05
0x06 INTEN
Operational State
Status Register
Interrupt Enable
Register
0x07 MODE Mode Register
0x08
0x09 TAPEN
0x0A TAPP
Tap Detection
Enable Register
Tap Pulse
Register
0x0B
DROP
Drop Event Control
Register
0x0C SHDB
XOUT
0x0D _EX_L
Shake Debounce
Register
XOUT Extended
Register
0x0E
XOUT
_EX_H
XOUT Extended
Register
YOUT YOUT Extended
0x0F _EX_L
Register
0x10
YOUT
_EX_H
YOUT Extended
Register
ZOUT ZOUT Extended
0x11 _EX_L
Register
0x12
ZOUT
_EX_H
ZOUT Extended
Register
0x13-0x17
SHAKED
OTPA
SHINTX
IAH
ZDA
Resv8
DROP_
MODE
Resv8
XOUT
_EX[7]
XOUT
_EX[15]
YOUT
_EX[7]
YOUT
_EX[15]
ZOUT
_EX[7]
ZOUT
_EX[15]
DROPD
0
SHINTY
IPP
YDA
Resv8
DINT
Resv8
XOUT
_EX[6]
XOUT
_EX[14]
YOUT
_EX[6]
YOUT
_EX[14]
ZOUT
_EX[6]
ZOUT
_EX[14]
TAPD
Resv8
SHINTZ
Resv8
XDA
Resv8
Resv8
SHDB
[5]
XOUT
_EX[5]
XOUT
_EX[13]
YOUT
_EX[5]
YOUT
_EX[13]
ZOUT
_EX[5]
ZOUT
_EX[13]
RESERVED6
POLA
[2]
POLA
[1]
0
0
RESERVED6
GINT ASINT
Resv8 Resv8
RESERVED6
Resv8 Resv8
Resv8
TAPP
[3]
Resv8 Resv8
SHDB
[4]
SHDB
[3]
XOUT XOUT
_EX[4] _EX[3]
XOUT XOUT
_EX[12] _EX[11]
YOUT YOUT
_EX[4] _EX[3]
YOUT YOUT
_EX[12] _EX[11]
ZOUT ZOUT
_EX[4] _EX[3]
ZOUT ZOUT
_EX[12] _EX[11]
RESERVED6
POLA
[0]
0
TINT
07
Resv8
TAPP
[2]
DROP_
DB[2]
SHDB
[2]
XOUT
_EX[2]
XOUT
_EX[10]
YOUT
_EX[2]
YOUT
_EX[10]
ZOUT
_EX[2]
ZOUT
_EX[10]
BAFR
[1]
OPSTAT
[1]
PLINT
OPCON
[1]
Resv8
TAPP
[1]
DROP_
DB[1]
SHDB
[1]
XOUT
_EX[1]
XOUT
_EX[9]
YOUT
_EX[1]
YOUT
_EX[9]
ZOUT
_EX[1]
ZOUT
_EX[9]
BAFR
[0]
OPSTAT
[0]
FBINT
OPCON
[0]
Resv8
TAPP
[0]
DROP_
DB[0]
SHDB
[0]
XOUT
_EX[0]
XOUT
_EX[8]
YOUT
_EX[0]
YOUT
_EX[8]
ZOUT
_EX[0]
ZOUT
_EX[8]
POR R/
Value W5
0x00 R
0x03 R
0x00 W
0x03 W
0x00 W
0x00 W
0x00 W
0x00 W
0x00 R
0x00 R
0x00 R
0x00 R
0x00 R
0x00 R
0x18 CHIPID Chip ID Register
0x19-0x1F
0x20 OUTCFG
0x21 XOFFL
Output
Configuration
Register
X-Offset
LSB Register
0
0
IRATE
LPF
[2]
0
0
0
0
1
RESERVED6
LPF
[1]
LPF HIRES HIRES
[0]
[1]
[0]
19
0
0x02 R
19
0x03 W
XOFF[7] XOFF[6] XOFF[5] XOFF[4] XOFF[3] XOFF[2] XOFF[1] XOFF[0] Per chip W
5 ‘R’ registers are read-only, via external I2C access. ‘W’ registers are read-write, via external I2C access.
6 Registers designated as ‘RESERVED’ should not be accessed by software.
7 Software must always write a zero ‘0’ to this bit.
8 Bits designated as ‘Resv’ are reserved for future use.
9 Software must always write a one ‘1’ to this bit.
mCube Proprietary.
APS-048-0010v2.2
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