MC3410 Datasheet, PDF (38/75 Pages) NXP Semiconductors – 10-Bit high-speed multiplying D/A converter

MC3410 3-Axis Accelerometer
Datasheet
10 I2C INTERFACE
10.1 PHYSICAL INTERFACE
The I2C slave interface operates at a maximum speed of 400 kHz. The SDA (data) is an open-
drain, bi-directional pin and the SCL (clock) is an input pin.
The device always operates as an I2C slave.
An I2C master initiates all communication and data transfers and generates the SCL clock that
synchronizes the data transfer. The I2C device address is 0x4c (8-bit address 0x98).
The I2C interface remains active as long as power is applied to the DVDD and AVDD pins. In
STANDBY state the device responds to I2C read and write cycles, but interrupts cannot be
serviced or cleared. All registers can be written in the STANDBY state, but in WAKE only the
MODE: Register can be modified.
Internally, the registers which are used to store samples are clocked by the sample clock gated
by I2C activity. Therefore, in order to allow the device to collect and present samples in the
sample registers at least one I2C STOP condition must be present between samples.
Refer to the I2C specification for a detailed discussion of the protocol. Per I2C requirements,
SDA is an open drain, bi-directional pin. SCL and SDA each require an external pull-up
resistor, typically 4.7kΩ. Refer also to Figure 3. Typical Application Circuit.
10.2 TIMING
See Section 4.3.3 I2C Timing Characteristics for I2C timing requirements.
10.3 I2C MESSAGE FORMAT
The device uses the following general format for writing to the internal registers. The I2C
master generates a START condition, and then supplies the device ID, 0x4C or 1001100. The
8^th bit is the R/W# flag (write cycle = 0). The device pulls SDA low during the 9^th clock cycle
indicating a positive ACK. This means, from an 8-bit point of view of an external I2C master,
writes should be written to address 0x98 and reads will occur by reading address 0x99.
The second byte is the 8-bit register address of the device to access, and the last byte is the
data to write.
I2C Master
(To Sensor)
I2C Slave
(From Sensor)
START
Device ID (4C)
R/W#
Register Address
Register Data to Write
Stop
S
10011000
R7 R6 R5 R4 R3 R2 R1 R0
D7 D6 D5 D4 D4 D2 D1 D0
P
ACK
ACK/NAK
ACK
ACK/NAK
ACK
ACK/NAK
Figure 18. I2C Message Format, Write Cycle, Single Register Write
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