LM3S2110 Datasheet, PDF (351/485 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S2110 Microcontroller
Table 14-1. Transmit Message Object Bit Settings
Register CANIFnARB2 CANIFnCMSK CANIFnMCTL CANIFnARB2
CANIFnMCTL
Bit
MsgVal Arb Data Mask
EoB
Dir
NewDat MsgLst RxIE TxIE IntPnd RmtEn TxRqst
Value
1
appl appl appl
1
1
0
0
0 appl 0
appl
0
The Xtd and ID bit fields in the CANIFnARBn registers are set by an application. They define the
identifier and type of the outgoing message. If an 11-bit Identifier (Standard Frame) is used, it is
programmed to bits [28:18] of CANIFnARB1, as bits 17:0 of CANIFnARBn are not used by the
CAN controller for 11-bit identifiers.
If the TxIE bit is set, the IntPnd bit is set after a successful transmission of the message object.
If the RmtEn bit is set, a matching received Remote Frame causes the TxRqst bit to be set and
the Remote Frame is autonomously answered by a Data Frame with the data from the message
object.
The DLC bit in the CANIFnMCTL register is set by an application. TxRqst and RmtEn may not be
set before the data is valid.
The CAN mask registers (Msk bits in CANIFnMSKn, UMask bit in CANIFnMCTL register, and MXtd
and MDir bits in CANIFnMSK2 register) may be used (UMask=1) to allow groups of Remote Frames
with similar identifiers to set the TxRqst bit. The Dir bit should not be masked.
14.4.5
Updating a Transmit Message Object
The CPU may update the data bytes of a Transmit Message Object any time via the CAN Interface
Registers and neither the MsgVal nor the TxRqst bits have to be reset before the update.
Even if only a part of the data bytes are to be updated, all four bytes of the corresponding
CANIFnDAn or CANIFnDBn register have to be valid before the content of that register is transferred
to the message object. Either the CPU has to write all four bytes into the CANIFnDAn or CANIFnDBn
register or the message object is transferred to the CANIFnDAn or CANIFnDBn register before the
CPU writes the new data bytes.
In order to only update the data in a message object, the WR, NewDat, DataA, and DataB bits are
written to the CAN IFn Command Mask (CANIFnMSKn) register, followed by writing the CAN IFn
Data registers, and then the number of the message object is written to the CAN IFn Command
Request (CANIFnCRQ) register, to update the data bytes and the TxRqst bit at the same time.
To prevent the reset of TxRqst at the end of a transmission that may already be in progress while
the data is updated, NewDat has to be set together with TxRqst. When NewDat is set together
with TxRqst, NewDat is reset as soon as the new transmission has started.
14.4.6
Accepting Received Message Objects
When the arbitration and control field (ID + Xtd + RmtEn + DLC) of an incoming message is
completely shifted into the CAN module, the message handling capability of the module starts
scanning the message RAM for a matching valid message object. To scan the message RAM for
a matching message object, the Acceptance Filtering unit is loaded with the arbitration bits from the
core. Then the arbitration and mask fields (including MsgVal, UMask, NewDat, and EoB) of message
object 1 are loaded into the Acceptance Filtering unit and compared with the arbitration field from
the shift register. This is repeated with each following message object until a matching message
object is found or until the end of the message RAM is reached. If a match occurs, the scanning is
stopped and the message handler proceeds depending on the type of frame received.
November 29, 2007
351
Preliminary