C8051F310 Datasheet, PDF (86/224 Pages) List of Unclassifed Manufacturers – 8/16 kB ISP Flash MCU Family

C8051F310/1/2/3/4/5/6/7
Table 8.3. Special Function Registers
Register
Address Description
SFRs are listed in alphabetical order. All undefined SFR locations are reserved
ACC
0xE0
Accumulator
ADC0CF
0xBC
ADC0 Configuration
ADC0CN
0xE8
ADC0 Control
ADC0GTH
0xC4
ADC0 Greater-Than Compare High
ADC0GTL
0xC3
ADC0 Greater-Than Compare Low
ADC0H
0xBE
ADC0 High
ADC0L
0xBD
ADC0 Low
ADC0LTH
0xC6
ADC0 Less-Than Compare Word High
ADC0LTL
0xC5
ADC0 Less-Than Compare Word Low
AMX0N
0xBA
AMUX0 Negative Channel Select
AMX0P
0xBB
AMUX0 Positive Channel Select
B
0xF0
B Register
CKCON
0x8E
Clock Control
CLKSEL
0xA9
Clock Select
CPT0CN
0x9B
Comparator0 Control
CPT0MD
0x9D
Comparator0 Mode Selection
CPT0MX
0x9F
Comparator0 MUX Selection
CPT1CN
0x9A
Comparator1 Control
CPT1MD
0x9C
Comparator1 Mode Selection
CPT1MX
0x9E
Comparator1 MUX Selection
DPH
0x83
Data Pointer High
DPL
0x82
Data Pointer Low
EIE1
0xE6
Extended Interrupt Enable 1
EIP1
0xF6
Extended Interrupt Priority 1
EMI0CN
0xAA
External Memory Interface Control
FLKEY
0xB7
Flash Lock and Key
FLSCL
0xB6
Flash Scale
IE
0xA8
Interrupt Enable
IP
0xB8
Interrupt Priority
IT01CF
0xE4
INT0/INT1 Configuration
OSCICL
0xB3
Internal Oscillator Calibration
OSCICN
0xB2
Internal Oscillator Control
OSCXCN
0xB1
External Oscillator Control
P0
0x80
Port 0 Latch
P0MDIN
0xF1
Port 0 Input Mode Configuration
P0MDOUT
0xA4
Port 0 Output Mode Configuration
P0SKIP
0xD4
Port 0 Skip
P1
0x90
Port 1 Latch
P1MDIN
0xF2
Port 1 Input Mode Configuration
P1MDOUT
0xA5
Port 1 Output Mode Configuration
P1SKIP
0xD5
Port 1 Skip
P2
0xA0
Port 2 Latch
P2MDIN
0xF3
Port 2 Input Mode Configuration
P2MDOUT
0xA6
Port 2 Output Mode Configuration
86
Rev. 1.6
Page
90
57
58
59
59
57
57
60
60
56
55
91
189
119
70
72
71
73
75
74
89
88
97
98
115
113
114
95
96
99
118
118
121
132
132
133
133
134
134
135
135
136
136
137