C8051F310 Datasheet, PDF (218/224 Pages) List of Unclassifed Manufacturers – 8/16 kB ISP Flash MCU Family

C8051F310/1/2/3/4/5/6/7
19.3. PCA Counter
On “REV A” devices, if the main PCA counter (PCA0H : PCA0L) overflows during the execution phase of a
read-modify-write instruction (bit-wise SETB or CLR, ANL, ORL, XRL) that targets the PCA0CN register,
the CF (Counter Overflow) bit will not be set. An example software work-around is as follows:
Step 1. Disable global interrupts (EA = 0).
Step 2. Read PCA0L. This will latch the value of PCA0H.
Step 3. Read PCA0H, saving the value.
Step 4. Execute the bit-wise operation on CCFn (for example, CLR CCF0, or CCF0 = 0;).
Step 5. Read PCA0L.
Step 6. Read PCA0H, saving the value.
Step 7. If the value of PCA0H read in Step 3 is 0xFF and the value for PCA0H read in Step 6 is
0x00, then manually set the CF bit in software (for example, SETB CF, or CF = 1;).
Step 8. Re-enable interrupts (EA = 1).
This behavior is not present on “REV B” and later devices. Software written for “REV A” devices will run on
“REV B” and later devices without modification.
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