C8051F310 Datasheet, PDF (217/224 Pages) List of Unclassifed Manufacturers – 8/16 kB ISP Flash MCU Family

C8051F310/1/2/3/4/5/6/7
19. Revision Specific Behavior
This chapter contains behavioral differences between C8051F310/1 “REV A” and “REV B” or later devices.
These differences do not affect the functionality or performance of most systems and are described below.
19.1. Revision Identification
The Lot ID Code on the top side of the device package can be used for decoding device revision informa-
tion. On C8051F310 devices, the revision letter is the second-to-last letter of the Lot ID Code. On
C8051F311 devices, the revision letter is the last letter of the Lot ID Code. Figure 19.1 shows how to find
the Lot ID Code on the top side of the device package.
C8051F310 Package Marking
C8051F310
T2ABGFAC
^ indicates REV A
0227 EP
C8051F311 Package Marking
CYG
F311
ABGFA
^ indicates REV A
Figure 19.1. Reading Package Marking
19.2. Reset Behavior
The reset behavior of C8051F310/1 “REV A” devices is different than “REV B” and later devices. The dif-
ferences affect the state of the RST pin during a V_DD Monitor reset and GPIO pins during any device reset.
19.2.1. Weak Pullups on GPIO Pins
On “REV A” devices, GPIO pins are tri-stated with weak pullups disabled during the assertion phase of
any reset. The pullups are enabled immediately following reset de-assertion.
On “REV B” and later devices, GPIO pins are tri-stated with weak pullups enabled during and after the
assertion phase of any reset.
19.2.2. V_DD Monitor and the RST Pin
On “REV A” devices, a V_DD Monitor reset does not affect the state of the RST pin.
On “REV B” and later devices, a V_DD Monitor reset will pull the RST pin low for the duration of the brown-
out condition.
Rev. 1.6
217