C8051F310 Datasheet, PDF (135/224 Pages) List of Unclassifed Manufacturers – 8/16 kB ISP Flash MCU Family

C8051F310/1/2/3/4/5/6/7
SFR Definition 13.9. P1MDOUT: Port1 Output Mode
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0 SFR Address:
0xA5
Bits7–0:
Output Configuration Bits for P1.7-P1.0 (respectively): ignored if corresponding bit in regis-
ter P1MDIN is logic 0.
0: Corresponding P1.n Output is open-drain.
1: Corresponding P1.n Output is push-pull.
Note: Only P1.0–P1.5 are associated with Port pins on the C8051F1316/7 devices.
SFR Definition 13.10. P1SKIP: Port1 Skip
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
‘F310/1/2/3/4/5:
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
00000000
‘F316/7:
11000000
SFR Address:
0xD5
Bits7–0:
P1SKIP[7:0]: Port1 Crossbar Skip Enable Bits.
These bits select Port pins to be skipped by the Crossbar Decoder. Port pins used as ana-
log inputs (for ADC or Comparator) or used as special functions (VREF input, external oscil-
lator circuit, CNVSTR input) should be skipped by the Crossbar.
0: Corresponding P1.n pin is not skipped by the Crossbar.
1: Corresponding P1.n pin is skipped by the Crossbar.
Note:
Only P1.0–P1.5 are associated with Port pins on the C8051F1316/7 devices. Hence, in C8051F316/7
devices, user code writing to this SFR should always set P1SKIP[7:6] = 11b so that those two pins are
skipped by the crossbar decoder.
Rev. 1.6
135