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GMZAN3 Datasheet, PDF (41/53 Pages) List of Unclassifed Manufacturers – XGA ALALOG INTERFACE LCD MONITOR CONTROLLER
gmZAN3 Preliminary Data Sheet
CELLMAP_XSZ * CELLMAP_YSZ +
CELL_HEIGHT * (Number of 1-bit per pixel fonts) +
CELL_HEIGHT * (Number of 2-bit per pixel fonts) * 2
< 5120
For example, an OSD menu 360 pixels wide by 360 pixels high is 30 cells in width and 20 cells in height
(if each cell is defined as 12 pixels wide and 18 lines high). Many of these cells would be the same (e.g.
empty). In this case, the menu could contain 51 1-bit per pixel cells and 100 2-bit per pixel cells. Of
course, different numbers of each type can also be used.
4.12.2 Color Look-up Table (LUT)
The Color Look-up Table (LUT) is stored in an on-chip RAM that is separate from the OSD RAM. The
LUT is 64 colors by 16-bit in a RGB 5:5:5 format (bit 0 selectively enables blending with scaler data.
4.13 General Purpose Inputs and Outputs (GPIO’s)
The gmZAN3 has up to 11 general-purpose input/output (GPIO) pins for the gmZAN3L and five GPIO
for the gmZAN3T.
4.14 Bootstrap Configuration Pins
The gmZAN3 has three bootstrap pins
Table 19. Bootstrap Signals
Signal Name
2_WIRE_ADDR_SEL
HP[1:0]
OSC_SEL
Pin Name
HDATA[3]
HDATA/AD/HP[1:0]
HDATA2/AD2/OSC_SEL
Description
If using 2-wire protocol, this selects one of the two slave addresses
0 = 0x70 & 0x71
1 = 0x94 & 0x95
To select Host Interface Configuration
00 Muxed Address/Data (AD) 8051 8-bit parallel interface
01 Reserved
10 2-wire interface
11 6-wire Genesis interface
TCLK Selection
0 External oscillator (input on TCLK pin)
1 Xtal and internal oscillator (In this mode, it is always recommended to use a 10KΩ pull-up resistor)
4.15 Host Interface
gmZAN3 contains many internal registers that control its operation. These are described in the gmZAN3
Register Listing (C0523-DSL-01).
Option 1: A direct 8051 muxed 8-bit address/data port supports high-speed access.
Option2: A serial host interface is provided to allow an external device to peek and poke registers in the
gmZAN3. This is done using a 2-wire serial protocol. Note that 2-wire host interface requires bootstrap
settings as described in Table 19.
C0523-DAT-01G
41
Genesis Microchip Confidential
http://www.genesis-microchip.com
July 2003