GMZAN3 Datasheet, PDF (22/53 Pages) List of Unclassifed Manufacturers – XGA ALALOG INTERFACE LCD MONITOR CONTROLLER

gmZAN3 Preliminary Data Sheet
Figure 7.
Sources of Parasitic Capacitance
Some attention must be given to the details of the oscillator circuit when used with a crystal resonator.
The PCB traces should be as short as possible. The value of C_load that is specified by the manufacturer
should not be exceeded because of potential start up problems with the oscillator. Additionally, the crystal
should be a parallel resonate-cut and the value of the equivalent series resistance must be less then 90
Ohms.
4.1.2 Using an External Clock Oscillator
Another option for providing the reference clock is to use a single-ended external clock oscillator. When
the gmZAN3 is in reset, the state of the HDATA2/AD2/OSC_SEL is sampled. If the pin is left
unconnected (internal pull-down) then external oscillator mode is enabled. In this mode the internal
oscillator circuit is disabled and the external oscillator signal that is connected to the TCLK pin is routed
to an internal clock buffer. This is illustrated in Figure 8.
Vdd
14 to 24 MHz
Vdd
Oscillator
GND
111
TCLK
110
XTAL
gmZAN3
Internal
Oscillator
Disable
OSC_OUT
TCLK Distribution
126
HDATA2/AD2/OSC_SEL
10K
(OPTIONAL)
Reset State Logic
Internal Pull Down
Resistor
~ 60 K
External Oscillator Enable
Figure 8.
Using an External Single-ended Clock Oscillator
C0523-DAT-01G
Table 12.
Frequency
Jitter Tolerance
Rise Time (10% to 90%)
TCLK Specification
12 to 24 MHz
250 ps
5 ns
22
Genesis Microchip Confidential
http://www.genesis-microchip.com
July 2003