LM3S611 Datasheet, PDF (8/409 Pages) List of Unclassifed Manufacturers – Microcontroller

List of Figures
List of Figures
Figure 1-1. Stellaris® High-Level Block Diagram ........................................................................................ 27
Figure 1-2. LM3S611 Controller System-Level Block Diagram ................................................................... 33
Figure 2-1. CPU Block Diagram .................................................................................................................. 35
Figure 2-2. TPIU Block Diagram .................................................................................................................. 36
Figure 5-1. JTAG Module Block Diagram .................................................................................................... 48
Figure 5-2. Test Access Port State Machine ............................................................................................... 51
Figure 5-3. IDCODE Register Format.......................................................................................................... 55
Figure 5-4. BYPASS Register Format ......................................................................................................... 55
Figure 5-5. Boundary Scan Register Format ............................................................................................... 56
Figure 6-1. External Circuitry to Extend Reset............................................................................................. 58
Figure 6-2. Main Clock Tree ........................................................................................................................ 61
Figure 7-1. Flash Block Diagram ................................................................................................................. 99
Figure 8-1. GPIO Module Block Diagram .................................................................................................. 117
Figure 8-2. GPIO Port Block Diagram........................................................................................................ 118
Figure 8-3. GPIODATA Write Example...................................................................................................... 119
Figure 8-4. GPIODATA Read Example ..................................................................................................... 119
Figure 9-1. GPTM Module Block Diagram ................................................................................................. 155
Figure 9-2. 16-Bit Input Edge Count Mode Example ................................................................................. 159
Figure 9-3. 16-Bit Input Edge Time Mode Example................................................................................... 160
Figure 9-4. 16-Bit PWM Mode Example .................................................................................................... 161
Figure 10-1. WDT Module Block Diagram ................................................................................................... 186
Figure 11-1. ADC Module Block Diagram.................................................................................................... 209
Figure 11-2. Internal Temperature Sensor Characteristic............................................................................ 212
Figure 12-1. UART Module Block Diagram.................................................................................................. 240
Figure 12-2. UART Character Frame........................................................................................................... 241
Figure 13-1. SSI Module Block Diagram...................................................................................................... 275
Figure 13-2. TI Synchronous Serial Frame Format (Single Transfer).......................................................... 277
Figure 13-3. TI Synchronous Serial Frame Format (Continuous Transfer) ................................................. 278
Figure 13-4. Freescale SPI Format (Single Transfer) with SPO=0 and SPH=0 .......................................... 279
Figure 13-5. Freescale SPI Format (Continuous Transfer) with SPO=0 and SPH=0 .................................. 279
Figure 13-6. Freescale SPI Frame Format with SPO=0 and SPH=1........................................................... 280
Figure 13-7. Freescale SPI Frame Format (Single Transfer) with SPO=1 and SPH=0............................... 280
Figure 13-8. Freescale SPI Frame Format (Continuous Transfer) with SPO=1 and SPH=0....................... 281
Figure 13-9. Freescale SPI Frame Format with SPO=1 and SPH=1........................................................... 281
Figure 13-10. MICROWIRE Frame Format (Single Frame)........................................................................... 282
Figure 13-11. MICROWIRE Frame Format (Continuous Transfer) ............................................................... 283
Figure 13-12. MICROWIRE Frame Format, SSIFss Input Setup and Hold Requirements............................ 284
Figure 14-1. I²C Block Diagram ................................................................................................................... 310
Figure 14-2. I²C Bus Configuration.............................................................................................................. 311
Figure 14-3. Data Validity During Bit Transfer on the I²C Bus..................................................................... 311
Figure 14-4. START and STOP Conditions ................................................................................................. 311
Figure 14-5. Complete Data Transfer with a 7-Bit Address ......................................................................... 312
Figure 14-6. R/S Bit in First Byte ................................................................................................................. 313
Figure 14-7. Master Single SEND................................................................................................................ 314
Figure 14-8. Master Single RECEIVE.......................................................................................................... 315
Figure 14-9. Master Burst SEND (sending n bytes)..................................................................................... 316
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April 27, 2007
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