LM3S611 Datasheet, PDF (330/409 Pages) List of Unclassifed Manufacturers – Microcontroller

Inter-Integrated Circuit (I2C) Interface
Register 4: I²C Master Timer Period (I2CMTPR), offset 0x00C
This register specifies the period of the SCL clock
I2C Master Timer Period (I2CMTPR)
Offset 0x00C
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
TPR
Type
RO
RO
RO
RO
RO
RO
RO
RO
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
Bit/Field
31:8
7:0
Name
reserved
TPR
Type
RO
R/W
Reset
0
0x1
Description
Reserved bits return an indeterminate value, and should never
be changed.
This field specifies the period of the SCL clock.
SCL_PRD = 2*(1 + TPR)*(SCL_LP +
SCL_HP)*CLK_PRD
where:
SCL_PRD is the SCL line period (I²C clock).
TPR is the Timer Period register value (range of 1 to 255).
SCL_LP is the SCL Low period (fixed at 6).
SCL_HP is the SCL High period (fixed at 4).
330
April 27, 2007
Preliminary