NRF9E5 Datasheet, PDF (55/104 Pages) List of Unclassifed Manufacturers – 433/868/915MHz RF Transceiver with Embedded 8051 Compatible Microcontroller and 4 Input, 10 Bit ADC

PRODUCT SPECIFICATION
nRF9 E5 Single Chip Transceiver with Embedded Microcontroller and ADC
Addr
Ctrl
[2:0]
0
1
2
3
4
5
R/W #bit
Ctrl
[3]
0
16
1
16
0
16
Init
Hex
0000
0000
0000
1
12
000
0
16
0000
1
16
0000
0
16
0000
1
0
-
0
9
000
Name
RWD
WWD
RGTIMER
WGTIMER
RRTCLAT
WRTCLAT
RRTC
WRTCDIS
RWSTA0
Function
Watchdog register (count)
Watchdog register (count)
15-8: MSB part of RTC counter
7-0: MSB part of RTC latch
11-8: GTIMER latch
7-0: MSB part of RTC latch
Least significant part of RTC latch
Least significant part of RTC latch
RTC counter value
Disable RTC (data not used)
Wakeup status
Bit 8: RTC timer status
7-0: Wakeup status for pins P07-P00
1
16
0000 WWCON0
0
9
000
RWSTA1
1
16
0000 WWCON1
GPIO wakeup configuration for
P03-P00. See Table 47.
Wakeup status (Identical to WSTA0)
GPIO wakeup configuration for
P07-P04. See Table 47.
Table 46 Indirect addresses and functions.
Bits
15:14
13:12
11:10
9:8
7:6
5:4
3:2
1:0
WWCON1 function
Edge selection for P07
Edge filter for P07
Edge selection for P06
Edge filter for P06
Edge selection for P05
Edge filter for P05
Edge selection for P04
Edge filter for P04
WWCON0 unction
Edge selection for P03
Edge filter for P03
Edge selection for P02
Edge filter for P02
Edge selection for P01
Edge filter for P01
Edge selection for P00
Edge filter for P00
Table 47 Bit fields in register WWCON1 and WWCON0.
16.7 Reset
The nRF9E5 can be reset either by the on-chip power-on reset circuitry or by the on-
chip watchdog counter.
16.7.1 Power-on Reset
The power-on reset circuitry keeps the chip in power-on-reset state until the supply
voltage reaches VDDmin (a voltage, less than 1.9V sufficiently high for digital
operation). At this point the internal voltage generators and oscillators start up, the SFRs
are initialized to their reset values, as listed in Table 62, and thereafter the CPU begins
program execution at the standard reset vector address 0x0000. The startup time from
power-on reset is normally determined by both the crystal oscillator startup time and the
frequency of the low power oscillator (LP_OSC). This total may vary from 1 to 3 ms
depending on processing, temperature and supply voltage.
Main office: Nordic Semiconductor ASA - Vestre Rosten 81, N-7075 Tiller, Norway -Phone [phone] - Fax [phone]
Revision: 1.1
Page 55 of 104
June 2004