NRF9E5 Datasheet, PDF (52/104 Pages) List of Unclassifed Manufacturers – 433/868/915MHz RF Transceiver with Embedded 8051 Compatible Microcontroller and 4 Input, 10 Bit ADC

PRODUCT SPECIFICATION
nRF9 E5 Single Chip Transceiver with Embedded Microcontroller and ADC
16.3 RTC Wakeup Timer
The RTC is a simple 24 bit down counter that produces an optional interrupt and reloads
automatically when the count reaches zero. This process is initially disabled, and will be
enabled with the first write to the lower 16 bit of the timer latch. Writing the lower 16
bits of the timer latch will always be followed by a reload of the counter. Writing the
upper 8 bit of the timer latch should only be done when the timer is disabled. The
counter may be disabled again by writing a disable opcode to the control register. Both
the latch and the counter value may be read by giving the respective codes in the control
register, see description in Table 45.
This counter is used for a wakeup sometime in the future (a relative time wakeup call).
If ‘N’ is written to the counter, the first wakeup will happen from somewhere between
‘N+1’ and ‘N+2’ “TICK” from the completion of the write, thereafter a new wakeup is
issued every “N+1” "TICK" until the unit is disabled or another value is written to the
latch.
The wakeup timer is one of the sources that can generate a WDTI interrupt to the CPU.
The programmer may poll the EICON.3 flag or enable the interrupt. If the device is in a
power down state, the wakeup will force the device to exit power down regardless of the
state of EIE.4 interrupt enable.
The nRF9E5 do not provide any “absolute time functions”. Absolute time functions in
nRF9E5 can well be handled in software since the RAM is continuously powered even
when in sleep mode.
16.4 Programmable GPIO Wakeup Function
Any number of the pins in port 0 may be used as wakeup signals for the nRF9E5. The
device may be programmed to react on either rising or falling or both edges of each pin
individually. Additionally each pin is equipped with a programmable “filter” that can be
used for glitch suppression.
CKLF
P0x
DEBOUNCE
[1:0]
EDGE
[3:2]
Wakeup P0x
WWCON
Figure 15 Wakeup filter, each pin for GPIO wakeup function.
The debounce act as a low pass filter. The input has to be stable for a number of clock
pulses given for the corresponding change to appear on the output. Edge triggers on
either positive, negative or both edges. The edge delay is 2 clock cycles. Please see
Table 44 and Table 47 for filter configuration.
Main office: Nordic Semiconductor ASA - Vestre Rosten 81, N-7075 Tiller, Norway -Phone [phone] - Fax [phone]
Revision: 1.1
Page 52 of 104
June 2004