NRF9E5 Datasheet, PDF (44/104 Pages) List of Unclassifed Manufacturers – 433/868/915MHz RF Transceiver with Embedded 8051 Compatible Microcontroller and 4 Input, 10 Bit ADC

PRODUCT SPECIFICATION
nRF9 E5 Single Chip Transceiver with Embedded Microcontroller and ADC
14 PWM
The nRF9E5 PWM output is a one-channel PWM with a 2 register interface. The first
register, PWMCON, enables PWM function and PWM period length, which is the
number of clock cycles for one PWM period, as shown in the table below. The other
register, PWMDUTY, controls the duty cycle of the PWM output signal. When this
register is written, the PWM signal will change immediately to the new value. This can
result in 4 transitions within one PWM period, but the transition period will always have
a “DC value” between the “old” sample and the “new” sample.
The table shows how PWM frequency (or period length) and PWM duty cycle are
controlled by the settings in the two PWM SFR-registers. For a crystal frequency of 16
MHz, PWM frequency range will be about 1-253 kHz.
PWMCON[7:6]
(Number of bits)
PWM frequency
PWMDUTY
(duty cycle)
00 (0)
01 (6)
10 (7)
11 (8)
0 (PWM module inactive)
f
XO
⋅
63
⋅
1
(PWMCON
[5
:
0]
+
1)
f
XO
⋅
127
⋅
1
(PWMCON
[5
:
0]+
1)
f
XO
⋅
255
⋅
1
(PWMCON
[5
:
0]+
1)
0
PWMDUTY [5 : 0]
63
PWMDUTY [6 : 0]
127
PWMDUTY
255
Table 34 PWM frequency and duty-cucle.
PWM is controlled by SFR 0xA9 and 0xAA.
Addr
SFR
(hex)
A9
AA
R/W #bit Init
(hex)
Name
Function
R/W 8
R/W 8
0 PWMCON
0 PWMDUTY
PWM control register
7-6: Enable / period length select
00: Disable PWM
01: Period length is 6 bit
10: Period length is 7 bit
11: Period length is 8 bit
5-0: PWM frequency prescale factor
(see table above)
PWM duty cycle (6 to 8 bits according to
period length)
Table 35 PWM control registers - SFR 0xA9 and 0xAA.
Main office: Nordic Semiconductor ASA - Vestre Rosten 81, N-7075 Tiller, Norway -Phone [phone] - Fax [phone]
Revision: 1.1
Page 44 of 104
June 2004