M14D128168A Datasheet, PDF (9/59 Pages) Elite Semiconductor Memory Technology Inc. – Internal pipelined double-data-rate architecture; two data access per clock cycle

ESMT
M14D128168A (2M)
Operation Temperature Condition (TC) -40°C~95°C
AC Overshoot / Undershoot Specification
Parameter
Pin
Maximum peak amplitude ^{Address, CKE, CS , RAS , CAS , WE , ODT,}
allowed for overshoot
CLK, CLK , DQ, DQS, DQS , DM
Maximum peak amplitude ^{Address, CKE, CS , RAS , CAS , WE , ODT,}
allowed for undershoot
CLK, CLK , DQ, DQS, DQS , DM
Maximum overshoot area
above V_DD
Address, CKE, CS , RAS , CAS , WE , ODT,
CLK, CLK , DQ, DQS, DQS , DM
Maximum undershoot area ^{Address, CKE, CS , RAS , CAS , WE , ODT,}
below V_SS
CLK, CLK , DQ, DQS, DQS , DM
Value
Unit
-1.8
-2.5
0.5
V
0.5
0.5
0.66
0.19
0.23
0.5
0.66
0.19
0.23
V
V-ns
V-ns
V-ns
V-ns
Elite Semiconductor Memory Technology Inc.
Publication Date : Feb. 2014
Revision : 1.0
9/59