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M14D128168A Datasheet, PDF (58/59 Pages) Elite Semiconductor Memory Technology Inc. – Internal pipelined double-data-rate architecture; two data access per clock cycle
ESMT
Revision History
Revision
1.0
Date
2014.02.27
M14D128168A (2M)
Operation Temperature Condition (TC) -40°C~95°C
Original
Description
Elite Semiconductor Memory Technology Inc.
Publication Date : Feb. 2014
Revision : 1.0
58/59