M14D128168A Datasheet, PDF(19/59 Page) Elite Semiconductor Memory Technology Inc. – Internal pipelined double-data-rate architecture; two data access per clock cycle

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M14D128168A Datasheet, PDF (19/59 Pages) Elite Semiconductor Memory Technology Inc. – Internal pipelined double-data-rate architecture; two data access per clock cycle

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ESMT

M14D128168A (2M)

Operation Temperature Condition (TC) -40Â°C~95Â°C

Slew Rate Definition Nominal

Elite Semiconductor Memory Technology Inc.

Publication Date : Feb. 2014

Revision : 1.0

19/59

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