EN27SN1G08 Datasheet, PDF (40/44 Pages) Eon Silicon Solution Inc. – 1 Gigabit (128 Mx 8), 1.8 V NAND Flash Memory

EN27SN1G08
Data Protection & Power-up sequence
The timing sequence shown in the figure below is necessary for the power-on/off sequence.
The device internal initialization starts after the power supply reaches an appropriate level in the power
on sequence. During the initialization the device R/B# signal indicates the Busy state as shown in the
figure below. In this time period, the acceptable commands are 70h.
The WP# signal is useful for protecting against data corruption at power on/off.
AC Waveforms for Power Transition
Write Protect Operation
Enabling WP during erase and program busy is prohibited. The erase and program operations are
enabled and disabled as follows:
Enable Programming:
NOTE: WP# keeps “High” until programming finish.
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
©2011 Eon Silicon Solution, Inc., www.eonssi.com
Rev. B, Issue Date: 2012/05/21