EN27SN1G08 Datasheet, PDF (38/44 Pages) Eon Silicon Solution Inc. – 1 Gigabit (128 Mx 8), 1.8 V NAND Flash Memory

Cache Read
EN27SN1G08
Cache Read is an extension of Page Read, and is available only within a block. The normal Page Read
command (00h-30h) is always issued before invoking Cache Read. After issuing the Cache Read
command (31h), read data of the designated page (page N) are transferred from data registers to cache
registers in a short time period of t_DCBSYR, and then data of the next page (page N+1) is transferred to
data registers while the data in the cache registers are being read out. Host controller can retrieve
continuous data and achieve fast read performance by iterating Cache Read operation. The Read Start
for Last Page Cache Read command (3Fh) is used to complete data transfer from memory cells to data
registers.
Read Operation with Cache Read
CLE
CE#
WE
ALE
RE#
I/Ox
R/B#
CLE
CE#
WE
ALE
RE#
I/Ox
R/B#
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
©2011 Eon Silicon Solution, Inc., www.eonssi.com
Rev. B, Issue Date: 2012/05/21