BCM4390DKWBGT Datasheet, PDF (70/78 Pages) Cypress Semiconductor – WICED™ Wi-Fi IEEE 802.11 b/g/n SoC with Embedded Application Processor

BCM4390 Advance Data Sheet
JTAG Timing
Table 24: Typical WLAN Power Consumption^a (Cont.)
Mode
Bandwidth
(MHz)
Band (GHz)
Vbat = 3.6V, VDDIO = 1.8V,
T(A) = 25°C
Vbat, mA
Vio, μA
Notes
Active Modes
Transmit, CCK
20
2.4
88
60
Notes^{e, f}
Transmit, MCS7
20
2.4
111
60
Transmit, CCK (@20 dBm) 20
2.4
342
60
Transmit, MCS7 (@18.5 dBm) 20
2.4
295
60
Receive
20
2.4
61
60
CRS
20
2.4
56
60
Notes^{e, f}
Notes^{f, g}
Notes^{f, g}
Notes^{f, h, i}
Note^j
a. Vio is specified with all pins idle (not switching) and not driving any loads.
b. WL_REG_ON and APPS_REG_ON are low.
c. Idle, not associated or inter-beacon.
d. Beacon interval is 102.4 ms and beacon duration is 1 ms @ 1 Mbps. Average current is over three DTIM
intervals.
e. Duty cycle is 100%.
f. Measured using packet engine test mode.
g. Duty cycle is 100%. It includes internal PA contribution.
h. Duty cycle is 100%. Carrier sense (CS) detect/packet receive.
i. MCS7 and HT20.
j. Carrier Sense (CCA) when no carrier is present.
JTAG Timing
Signal Name
TCK
TDI
TMS
TDO
JTAG_TRST
Table 25: JTAG Timing Characteristics
Output
Output
Period
Maximum
Minimum
Setup
Hold
125 ns
–
–
–
–
–
–
–
20 ns
0 ns
–
–
–
20 ns
0 ns
–
100 ns
0 ns
–
–
250 ns
–
–
–
–
BROADCOM ®
February 5, 2014 • 4390-DS103-R
WICED Wi-Fi IEEE 802.11 SoC w/Embedded App Processor
Page 69
BROADCOM CONFIDENTIAL