BCM4390DKWBGT Datasheet, PDF (32/78 Pages) Cypress Semiconductor – WICED™ Wi-Fi IEEE 802.11 b/g/n SoC with Embedded Application Processor

BCM4390 Advance Data Sheet
IEEE 802.11n MAC
The BCM4390 WLAN media access controller (MAC) supports features specified in the IEEE 802.11 base
standard, and amended by IEEE 802.11n. The key MAC features include:
• Enhanced MAC for supporting IEEE 802.11n features
• Transmission and reception of aggregated MPDUs (A-MPDU) for high throughput (HT)
• Support for power management schemes, including WMM power-save, power-save multi-poll (PSMP) and
multiphase PSMP operation
• Support for immediate ACK and Block-ACK policies
• Interframe space timing support, including RIFS
• Support for RTS/CTS and CTS-to-self frame sequences for protecting frame exchanges
• Back-off counters in hardware for supporting multiple priorities as specified in the WMM specification
• Timing synchronization function (TSF), network allocation vector (NAV) maintenance, and target beacon
transmission time (TBTT) generation in hardware
• Hardware offload for AES-CCMP, legacy WPA TKIP, legacy WEP ciphers, WAPI, and support for key
management
• Programmable independent basic service set (IBSS) or infrastructure basic service set functionality
• Statistics counters for MIB support
Programmable State Machine
The programmable state machine (PSM) is a microcoded engine, which provides most of the low-level control
to the hardware, to implement the IEEE 802.11 specification. It is a microcontroller that is highly optimized for
flow control operations, which are predominant in implementations of communication protocols. The
instruction set and fundamental operations are simple and general, which allows algorithms to be optimized
until very late in the design process. It also allows for changes to the algorithms to track evolving IEEE 802.11
specifications.
The PSM fetches instructions from the microcode memory. It uses the shared memory to obtain operands for
instructions, as a data store, and to exchange data between both the host and the MAC data pipeline (via the
SHM bus). The PSM also uses a scratch-pad memory (similar to a register bank) to store frequently accessed
and temporary variables.
The PSM exercises fine-grained control over the hardware engines, by programming internal hardware
registers (IHR). These IHRs are co-located with the hardware functions they control, and are accessed by the
PSM via the IHR bus.
The PSM fetches instructions from the microcode memory using an address determined by the program
counter, instruction literal, or a program stack. For ALU operations the operands are obtained from shared
memory, scratch pad, IHRs, or instruction literals, and the results are written into the shared memory, scratch
pad, or IHRs.
There are two basic branch instructions: conditional branches and ALU based branches. To better support the
many decision points in the IEEE 802.11 algorithms, branches can depend on either a readily available signals
from the hardware modules (branch condition signals are available to the PSM without polling the IHRs), or on
the results of ALU operations.
BROADCOM ®
February 5, 2014 • 4390-DS103-R
WICED Wi-Fi IEEE 802.11 SoC w/Embedded App Processor
Page 31
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