BCM4390DKWBGT Datasheet, PDF (26/78 Pages) Cypress Semiconductor – WICED™ Wi-Fi IEEE 802.11 b/g/n SoC with Embedded Application Processor

BCM4390 Advance Data Sheet
Desired Rate
57600
38400
28800
19200
14400
9600
Table 5: Example of Common Baud Rates (Cont.)
Actual Rate
57692
38400
28846
19200
14423
9600
Error (%)
0.16
0.00
0.16
0.00
0.16
0.00
The UART timing is shown by the combination of Figure 6 and Table 6.
Figure 6: UART Timing
UART_CTS_N
1
UART_TXD
UART_RXD
UART_RTS_N
Midpoint of STOP bit
3
I²S Interface
2
Midpoint of STOP bit
Table 6: UART Timing Specifications
Ref No. Characteristics
1
Delay time, UART_CTS_N low to UART_TXD valid
2
Setup time, UART_CTS_N high before midpoint of stop bit
3
Delay time, midpoint of stop bit to UART_RTS_N high
Min. Typ. Max. Unit
–
–
1.5 Bit periods
–
–
0.5 Bit periods
–
–
0.5 Bit periods
I²S Interface
The BCM4390 has one I²S digital audio port, which supports both master and slave modes.
The I²S SCK and I²S WS (clock and word select) become outputs in master mode and inputs in slave mode, while
the I2S SDO is always output.
BROADCOM ®
February 5, 2014 • 4390-DS103-R
WICED Wi-Fi IEEE 802.11 SoC w/Embedded App Processor
Page 25
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