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BCM4390DKWBGT Datasheet, PDF (67/78 Pages) Cypress Semiconductor – WICED™ Wi-Fi IEEE 802.11 b/g/n SoC with Embedded Application Processor
BCM4390 Advance Data Sheet
CLDO
CLDO
Table 21: CLDO Specifications
Specification
Notes
Min Typ Max Units
Input supply voltage, Vin
Min = 1.2 + 0.15V = 1.35V dropout voltage 1.3 1.35 1.5 V
requirement must be met under maximum
load.
Output current
–
0.2 – 300 mA
Output voltage, Vo
Programmable in 25 mV steps.
Default = 1.2.V
1.1 1.2 1.275 V
Dropout voltage
At max load
– – 150 mV
Output voltage DC accuracy Includes line/load regulation
–4 – +4 %
Quiescent current
No load
– 24 – μA
300 mA load
– 2.1 – mA
Line Regulation
Load Regulation
Vin from (Vo + 0.15V) to 1.5V, maximum load –
Load from 1 mA to 300 mA
–
– 5 mV/V
0.02 0.05 mV/mA
Leakage Current
Power down
– – 20 μA
Bypass mode
– 1 3 μA
PSRR
Start-up Time of PMU
@1 kHz, Vin ≥ 1.35V, Co = 4.7 μF
20 –
VIO up and steady. Time from the REG_ON – –
rising edge to the CLDO reaching 1.2V.
dB
700 μs
LDO Turn-on Time
LDO turn-on time when rest of the chip is up – 140 180 μs
External Output Capacitor, Co Total ESR: 5 mΩ–240 mΩ
1.32a 4.7 – μF
External Input Capacitor
Only use an external input capacitor at the – 1 2.2 μF
VDD_LDO pin if it is not supplied from CBUCK
output.
a. Minimum capacitor value refers to the residual capacitor value after taking into account the part-to-
part tolerance, DC-bias, temperature, and aging.
BROADCOM ®
February 5, 2014 • 4390-DS103-R
WICED Wi-Fi IEEE 802.11 SoC w/Embedded App Processor
Page 66
BROADCOM CONFIDENTIAL