CMX989 Datasheet, PDF (27/31 Pages) CML Microcircuits – CDPD MAC and Data Pump Processor

CDPD MAC and Data Pump Processor
CMX989
2. Small signal impedance
3. Timing for an external input to the CLOCK/XTAL pin
4. WRN, RDN, CSN, A0 – A2 pins
5. D0 - D7 pins
6. IRQN pin
7. Measured at TXOP1 and TXOP2 with MOD1/2 gain blocks set to 0dB
8. Measured at RXFB pin
9. Bit period = 52µs
10. The delay of the start of the Tx dotting sequence from the end of a microslot or end of the
busy/idle flag. The CDPD specification states 8 bits maximum.
Timing Diagrams
Figure 5 µController Parallel Interface Timings
© 2001 Consumer Microcircuits Limited
27
D/989/2