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CMX989 Datasheet, PDF (26/31 Pages) CML Microcircuits – CDPD MAC and Data Pump Processor
CDPD MAC and Data Pump Processor
CMX989
1.7.1.3 Operating Characteristics
For the following conditions unless otherwise specified:
Xtal Frequency = 4.9152MHz, Bit Rate = 19.2k bits/sec, Noise Bandwidth = Bit Rate,
VDD = 3.0V to 5.5V, Tamb = - 40°C to +85°C and VDD = 2.7V at Tamb = 25°C.
DC Parameters
IDD (zero-power) at VDD = 3.0V
IDD (zero-power) at VDD = 5.0V
IDD (Rx only) at VDD = 3.0V
IDD (Rx only) at VDD = 5.0V
IDD (Tx only) at VDD = 3.0V
IDD (Tx only) at VDD = 5.0V
IDD (Rx and Tx) at VDD = 3.0V
IDD (Rx and Tx) at VDD = 5.0V
Notes
1
1
1
1
1
1
1
1
Min.
–
–
–
–
–
–
–
–
Typ.
1.0
1.0
1.0
2.0
2.0
3.5
2.0
4.0
Max.
10.0
10.0
1.5
3.0
3.0
5.2
3.0
6.0
AC Parameters
Tx Output
Tx O/P impedance (powersaved)
Tx O/P impedance (operating)
Signal level
Tx Processing Delay
TXOP1 or TXOP2 dc level (transmitting "1010...")
(in Tx mode, MOD1 and MOD2 gain OFF)
(in Powersave - Tx mode disabled)
(in zero-power mode)
Tx delay from Rx busy/idle flag
2
300
500
–
2
–
1.0
2.5
7
0.9
1.0
1.1
9
–
1
–
TBD
50%
TBD
TBD
50%
TBD
TBD
50%
TBD
–
0
–
10
4
Rx Input
Rx I/P pin impedance (at 100Hz)
Rx I/P amp open loop voltage gain
(I/P = 1mV rms at 100Hz)
Input signal level
Rx Processing Delay
Block error rate at 6dB
10
–
–
–
500
–
8
0.1
1.0
VDD
9
–
7
–
0.5
Xtal/Clock Input
'High' pulse width
'Low' pulse width
Input impedance (at 100Hz)
Gain (I/P = 1mV rms at 1kHz)
3
40
–
–
3
40
–
–
10
–
–
20
–
–
µC Interface
Input logic "1" level
Input logic "0" level
Input leakage current (Vin = 0 to VDD)
Input capacitance
Output logic "1" level (lOH = 120µA)
Output logic "0" level (lOL = 360µA)
'Off' state leakage current (Vout = VDD)
4, 5 80%
–
–
4, 5
–
–
20%
4, 5
-5.0
–
+5.0
4, 5
–
7.5
–
5 90%
–
–
5, 6
–
–
10%
6
–
–
10
Units
µA
µA
mA
mA
mA
mA
mA
mA
kΩ
kΩ
Vp-p
Bit
VDD
VDD
VDD
V
Bits
MΩ
V/V
Vp-p
Bits
%
ns
ns
MΩ
dB
VDD
VDD
µA
pF
VDD
VDD
µA
Note: 1. Not including any current drawn from the device pins by external circuitry
© 2001 Consumer Microcircuits Limited
26
D/989/2