CS42324 Datasheet, PDF (54/71 Pages) Cirrus Logic – 10-In, 6-Out, 2 Vrms Audio CODEC

CS42324
6.10.4 DAC1 Zero Cross Control
Zero Cross Enable dictates that signal level changes, either by attenuation changes or muting, will occur
on a signal zero crossing to minimize audible artifacts. The requested level change will occur after a time-
out period between 512 and 1024 sample periods (10.7 ms to 21.3 ms at 48 kHz sample rate) if the signal
does not encounter a zero crossing. The zero cross function is independently monitored and implemented
for each channel.
Soft Ramp and Zero Cross Enable
Soft Ramp and Zero Cross Enable dictate that signal level changes, either by attenuation changes or mut-
ing, will occur in 1/8 dB steps and be implemented on a signal zero crossing. The 1/8 dB level change will
occur after a time-out period between 512 and 1024 sample periods (10.7 ms to 21.3 ms at 48 kHz sam-
ple rate) if the signal does not encounter a zero crossing. The zero cross function is independently mon-
itored and implemented for each channel.
DAC1_SOFT
0
0
1
1
6.10.5 DAC1 Loop-Back
DAC1_ZC
0
1
0
1
Loops ADC SDOUT, SCLK, and LRCK to DAC1 serial port pins.
Mode
Changes to affect immediately
Zero Cross enabled
Soft Ramp enabled
Soft Ramp and Zero Cross enabled
DAC1_LOOP_
BACK
0
Off
1
On
DAC1 Loop-Back
6.10.6 DAC1 Invert Signal Polarity
When enabled, this bit will effect a 180 degree phase shift in the DAC1 channels.
DAC1_INV
0
Off
1
On
DAC1 Invert Signal Polarity
6.10.7 DAC1 Channel Mixer
These bits implement mono mixes of the left and right channels as well as a left/right channel swap.
DAC1_MIX[1:0]
00
01
10
11
L
L_----+_----R_--
2
R
DAC1 OUTA
R
L_----+_----R_--
2
L
DAC1 OUTB
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DS721A6