CS42324 Datasheet, PDF (27/71 Pages) Cirrus Logic – 10-In, 6-Out, 2 Vrms Audio CODEC

CS42324
+3.3 V
10 µF 0.1 µF
0.1 µF 10 µF
+9 V to +12 V
+3.3 V
3.3 µF
10 µF 0.1 µF
1 µF 0.1 µF 1 µF 0.1 µF
3.3 µF 0.1 µF 3.3 µF 0.1 µF
Note 1 :
For best response to Fs/2 :
C
=
R_ext + 470
4πFs(R_ext × 470)
This circuitry is intended for applications where
the CS42324 connects directly to a line level
output. For internal routing applications please
see the DAC Analog Output Characteristics
section for loading limitations. Rext is the load
impedance.
SOC/DSP
VL
* See
Note 2 ^{5 kΩ}
+1.8V
to +3.3V
0.1 µF
Note 2 :
Pull-up on SDOUT indicates hardware mode
operation
VD
VA
VA_H VA_H
MUTEC1
AOUT1A
VBIAS ^CS42324
VCMADC
FILT+
AOUT1B
470 Ω
3.3 µF 10 kΩ
3.3 µF 10 kΩ
470 Ω
Optional
Analog
Muting
*C
* See Note 1
*_C
2 Vrms Left
Analog Out 1
2 Vrms Right
Analog Out 1
GND
VCMBUF
VCMDAC
MUTEC2
AOUT2A
AOUT2B
470 Ω
3.3 µF 10 kΩ
3.3 µF 10 kΩ
470 Ω
Optional
Analog
Muting
*C
* See Note 1
*_C
2 Vrms Left
Analog Out 2
2 Vrms Right
Analog Out 2
MUTEC3
AOUT3A
AOUT3B
470 Ω
3.3 µF 10 kΩ
3.3 µF 10 kΩ
470 Ω
Optional
Analog
Muting
*C
* See Note 1
*C
2 Vrms Left
Analog Out 3
2 Vrms Right
Analog Out 3
MCLK2
SCLK2
* Capacitors must be C0G or equivalent
LRCK2
SDIN1
SDIN2
MCLK1
1 µF
AIN1A
1 µF
AIN1B
2 Vrms Left
Analog In 1
2 Vrms Right
Analog In 1
SCLK1
LRCK1
SDOUT
RST
OVFL
M0
M1
MDIV
MUTE
DIF
VL
1 µF
AIN2A
1 µF
AIN2B
1 µF
AIN3A
1 µF
AIN3B
1 µF
AIN4A
1 µF
AIN4B
1 µF
AIN5A
2 Vrms Left
Analog In 2
2 Vrms Right
Analog In 2
2 Vrms Left
Analog In 3
2 Vrms Right
Analog In 3
2 Vrms Left
Analog In 4
2 Vrms Right
Analog In 4
2 Vrms Left
Analog In 5
1 µF
AIN5B
2 Vrms Right
Analog In 5
GND
GNDH
Figure 8. Typical Connection Diagram - Hardware Mode
DS721A6
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