CS42324 Datasheet, PDF (44/71 Pages) Cirrus Logic – 10-In, 6-Out, 2 Vrms Audio CODEC

CS42324
5. REGISTER QUICK REFERENCE
This table shows the register names and their associated default values. All bits marked as “Reserved” must main-
tain their default values.
Addr Function
00h Device ID
7
DEVICE3
6
DEVICE2
5
DEVICE1
4
DEVICE0
3
REV3
2
REV2
1
REV1
0
REV0
page 46
01h Mute Control
page 46
02h Operational
Control
page 47
03h Serial Port 1
Control
page 49
04h Serial Port 2
Control
page 50
05h Reserved
0
1
Reserved SYS_MCLK
0
Reserved
1
PDN
1
DAC2_
MuteL
0
INT_HL
0
DAC2_
MuteR
0
FREEZE
x
DAC1_
MuteL
0
Reserved
x
DAC1_
MuteR
0
TRI-SDOUT
x
ADC_
MuteL
0
TRI-SP1
x
ADC_
MuteR
0
TRI-SP2
0
SP1_M/S
0
SP2_M/S
0
Reserved
1
Reserved
0
Reserved
0
Reserved
0
Reserved
0
Reserved
0
Reserved
0
SP1_
SPEED
0
SP2_
SPEED
0
Reserved
0
MCLK1
FREQ1
0
MCLK2
FREQ1
0
Reserved
0
MCLK1
FREQ0
0
MCLK2
FREQ0
0
Reserved
0
0
Reserved SP1_MCLK
0
0
Reserved SP2_MCLK
0
Reserved
0
Reserved
06h ADC clocking
page 50
07h DAC1 clocking
page 51
08h DAC2 clocking
page 52
09h Reserved
0Ah ADC Control
page 52
0Bh DAC1 Control
page 53
0Ch DAC2 Control
page 55
0Dh AOUT1 Control
page 56
0Eh AOUT2 Control
page 57
0Fh AOUT3 Control
page 57
0
Reserved
0
Reserved
0
Reserved
0
Reserved
0
Reserved
1
DAC1_
DEPH
0
DAC2_
DEPH
0
Reserved
0
Reserved
0
Reserved
0
0
ADC_
MCLK
0
DAC1_
MCLK
0
DAC2_
MCLK
0
Reserved
0
ADC_
HPFRZ
0
DAC1_
SNGVOL
0
DAC2_
SNGVOL
0
Reserved
0
Reserved
0
Reserved
0
0
Reserved
0
Reserved
0
ADC_
SP
0
DAC1_SP
0
Reserved
1
DAC2_SP
0
1
Reserved Reserved
0
0
ADC_
SOFT
Reserved
1
0
DAC1_SOFT DAC1_ZC
1
DAC2_
SOFT
1
Reserved
0
DAC2_
ZC
0
Reserved
0
Reserved
0
Reserved
0
Reserved
0
Reserved
0
0
0
Reserved
0
Reserved
0
0
ADC_DIF1 ADC_DIF0
1
Reserved
0
0
0
Reserved DAC1_DIF1 DAC1_DIF0
1
Reserved
0
0
0
Reserved DAC2_DIF1 DAC2_DIF0
1
Reserved
0
Reserved
0
Reserved
0
AIN_SEL2
0
Reserved
0
AIN_SEL1
0
Reserved
0
AIN_SEL0
0
0
0
1
DAC1_ DAC1_INV DAC1_MIX1 DAC1_MIX0
LOOPBACK
0
0
0
0
DAC2_ DAC2_INV DAC2_MIX1 DAC2_MIX0
LOOPBACK
0
0
0
0
MUTEC1
AOUT1_
SEL2
AOUT1_
SEL1
AOUT1_
SEL0
0
1
1
0
MUTEC2
AOUT2_
SEL2
AOUT2_
SEL1
AOUT2_
SEL0
0
1
1
1
MUTEC3
AOUT3_
SEL2
AOUT3_
SEL1
AOUT3_
SEL0
0
0
0
1
44
DS721A6