SAMA5D3_14 Datasheet, PDF (898/1840 Pages) ATMEL Corporation – ARM-based Embedded MPU

• TX_COMPLT: Transmitted IN Data Complete Interrupt Disable
0: No effect.
1: Disable Transmitted IN Data Complete Interrupt.
• TXRDY: TX Packet Ready Interrupt Disable
0: No effect.
1: Disable TX Packet Ready/Transaction Error Interrupt.
• RX_SETUP: Received SETUP Interrupt Disable
0: No effect.
1: Disable RX_SETUP Interrupt.
• STALL_SNT: Stall Sent Interrupt Disable
0: No effect.
1: Disable Stall Sent Interrupt.
• NAK_IN: NAKIN Interrupt Disable
0: No effect.
1: Disable NAKIN Interrupt.
• NAK_OUT: NAKOUT Interrupt Disable
0: No effect.
1: Disable NAKOUT Interrupt.
• BUSY_BANK: Busy Bank Interrupt Disable
0: No effect.
1: Disable Busy Bank Interrupt.
• SHRT_PCKT: Short Packet Interrupt Disable
For OUT endpoints:
0: No effect.
1: Disable Short Packet Interrupt.
For IN endpoints: Never automatically add a zero length packet at end of DMA transfer.
SAMA5D3 Series [DATASHEET]
11121D–ATARM–03-Apr-14
898