SAMA5D3_14 Datasheet, PDF (1825/1840 Pages) ATMEL Corporation – ARM-based Embedded MPU

Doc. Rev.
11121C Comments
Change
Request
Ref.
Section 46. “Controller Area Network (CAN)”
Minor editorial formatting changes throughout
Section 46.6.3 “Interrupt”: replaced “AIC” occurrences with “interrupt controller”
Table 46-4 “Receive Mailbox Objects”: added missing title
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Table 46-5 “Transmit Mailbox Objects”: added missing title
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Section 46.7.4.1 “CAN Bit Timing Configuration”: moved three bullets describing the phase segments to
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precede the bullet “TIME QUANTAM”
Section 46.8.1 “CAN Controller Initialization”: replaced “AIC” occurrences with “interrupt controller”
Figure 46-10 “Possible Initialization Procedure”: replaced instance of “AIC” with “Interrupt Controller”
WPMR register reformat using WPKEY table in Section 46.9.12 “CAN Write Protection Mode Register”
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Section 47. “Software Modem Device (SMD)”
Section 47.1 “Description”: replaced acronym HLSD with LSD
Added Section 47.4 “Software Modem Device (SMD) User Interface” (includes Section 47.4.1 “SMD Drive
Register”)
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Section 47. “Timer Counter (TC)”
Editorial and formatting changes throughout
Section 47.1 “Description”: replaced “and TIOA1 inputs” with “and TIOB1 inputs”
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Figure 47-5 “Example of Transfer with DMAC” replaced “Internal PDC trigger” with “Peripheral trigger”
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Section 47.6.15.3 “Direction Status and Change Detection”: rewrote sixth paragraph for clarity
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Section 47.6.15.4 “Position and Rotation Measurement”: rewrote first paragraph for clarity
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Section 47.6.15.5 “Speed Measurement”: replaced sentence “The speed can be read on TC_RA0 register in rfo
TC_CMR0” with “The speed can be read on field RA in register TC_RA0”
Section 47.6.17 “Register Write Protection”: changed title (was “Write Protection System”); revised content rfo
Section 47.7.2 “TC Channel Mode Register: Capture Mode”: updated TCCLKS field description (values 0 to 4) 9107
Section 47.7.3 “TC Channel Mode Register: Waveform Mode”:
- updated ENETRG bit description
- updated TCCLKS field description (values 0 to 4)
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Section 47.7.15 “TC Block Mode Register”:
- updated FILTER bit description
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- corrected TC2XC2S field configuration values: value 2 is TIOA0 (was TIOA1); value 3 is TIOA1 (was TIOA2) 9353
Section 47.7.20 “TC Write Protection Mode Register”: modified register name (was “TC Write Protect Mode
Register”); updated field descriptions
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SAMA5D3 Series [DATASHEET] 1825
11121D–ATARM–03-Apr-14