SAMA5D43_14 Datasheet, PDF (715/1776 Pages) ATMEL Corporation – Atmel | SMART ARM-based Embedded MPU

32.7.36 Overlay 1 Channel Status Register
Name:
LCDC_OVR1CHSR
Address: 0xF0000148
Access:
Read-only
31
30
29
28
27
–
–
–
–
–
23
22
21
20
19
–
–
–
–
–
15
14
13
12
11
–
–
–
–
–
7
6
5
4
3
–
–
–
–
–
• CHSR: Channel Status Register
0: Layer disabled
1: Layer enabled
• UPDATESR: Update Overlay Attributes In Progress Status Register
0: No update pending
1: Overlay attributes will be updated on the next frame
• A2QSR: Add To Queue Status Register
0: Add to queue not pending
1: Add to queue pending
26
–
18
–
10
–
2
A2QSR
25
–
17
–
9
–
1
UPDATESR
24
–
16
–
8
–
0
CHSR
SAMA5D4 Series [DATASHEET]
Atmel-11238A-ATARM-SAMA5D4-Datasheet_30-Sep-14
715