SAMA5D43_14 Datasheet, PDF (30/1776 Pages) ATMEL Corporation – Atmel | SMART ARM-based Embedded MPU

At reset the selected drive is low. The user must make sure to program the correct drive according to the device
load.
5.8 I/O Drive Selection
The aim of this control is to adapt the signal drive to the frequency. The general purpose I/O lines can drive high
speed or low speed signals depending on the PIO multiplexing. To reduce the overshoots and improve the EMI
behavior, the I/Os feature a drive control which can be enabled in the PIO user interface. The PIO controller
embeds drive control registers. Two bits per I/O allow to select one drive from [High, Medium, Low] list.
30 SAMA5D4 Series [DATASHEET]
Atmel-11238A-ATARM-SAMA5D4-Datasheet_30-Sep-14