SAMA5D43_14 Datasheet, PDF (1120/1776 Pages) ATMEL Corporation – Atmel | SMART ARM-based Embedded MPU

38.14 High Speed MultiMedia Card Interface (HSMCI) User Interface
Table 38-9. Register Mapping
Offset
Register
0x00
0x04
0x08
Control Register
Mode Register
Data Timeout Register
0x0C
SD/SDIO Card Register
0x10
0x14
Argument Register
Command Register
0x18
0x1C
0x20
0x24
0x28
0x2C
Block Register
Completion Signal Timeout Register
Response Register⁽¹⁾
Response Register⁽¹⁾
Response Register⁽¹⁾
Response Register⁽¹⁾
0x30
Receive Data Register
0x34
Transmit Data Register
0x38–0x3C
0x40
0x44
0x48
Reserved
Status Register
Interrupt Enable Register
Interrupt Disable Register
0x4C
0x50
0x54
0x58–0xE0
Interrupt Mask Register
DMA Configuration Register
Configuration Register
Reserved
0xE4
Write Protection Mode Register
0xE8
Write Protection Status Register
0xEC–0xFC
0x100–0x1FC
0x200
Reserved
Reserved
FIFO Memory Aperture0
...
...
0x5FC
FIFO Memory Aperture255
Name
HSMCI_CR
HSMCI_MR
HSMCI_DTOR
HSMCI_SDCR
HSMCI_ARGR
HSMCI_CMDR
HSMCI_BLKR
HSMCI_CSTOR
HSMCI_RSPR
HSMCI_RSPR
HSMCI_RSPR
HSMCI_RSPR
HSMCI_RDR
HSMCI_TDR
–
HSMCI_SR
HSMCI_IER
HSMCI_IDR
HSMCI_IMR
HSMCI_DMA
HSMCI_CFG
–
HSMCI_WPMR
HSMCI_WPSR
–
–
HSMCI_FIFO0
...
HSMCI_FIFO255
Access
Write-only
Read/Write
Read/Write
Read/Write
Read/Write
Write-only
Read/Write
Read/Write
Read-only
Read-only
Read-only
Read-only
Read-only
Write-only
–
Read-only
Write-only
Write-only
Read-only
Read/Write
Read/Write
–
Read/Write
Read-only
–
–
Read/Write
...
Read/Write
Reset
–
0x0
0x0
0x0
0x0
–
0x0
0x0
0x0
0x0
0x0
0x0
0x0
–
–
0xC0E5
–
–
0x0
0x00
0x00
–
–
–
–
–
0x0
...
0x0
Notes: 1. The Response Register can be read by N accesses at the same HSMCI_RSPR or at consecutive addresses (0x20 to
0x2C). N depends on the size of the response.
1120
SAMA5D4 Series [DATASHEET]
Atmel-11238A-ATARM-SAMA5D4-Datasheet_30-Sep-14