SAMA5D43_14 Datasheet, PDF (599/1776 Pages) ATMEL Corporation – Atmel | SMART ARM-based Embedded MPU

31.9.2 XDMAC Global Configuration Register
Name:
XDMAC_GCFG
Address: 0xF0014004 (0), 0xF0004004 (1)
Access:
Read-only
31
30
29
28
27
–
–
–
–
–
23
22
21
20
19
–
–
–
–
–
15
14
13
12
11
–
–
–
–
–
7
6
5
4
3
–
–
–
–
CGDISIF
• CGDISREG: Configuration Registers Clock Gating Disable
0: The automatic clock gating is enabled for the configuration registers.
1: The automatic clock gating is disabled for the configuration registers.
• CGDISPIPE: Pipeline Clock Gating Disable
0: The automatic clock gating is enabled for the main pipeline.
1: The automatic clock gating is disabled for the main pipeline.
• CGDISFIFO: FIFO Clock Gating Disable
0: The automatic clock gating is enabled for the main FIFO.
1: The automatic clock gating is disabled for the main FIFO.
• CGDISIF: Bus Interface Clock Gating Disable
0: The automatic clock gating is enabled for the system bus interface.
1: The automatic clock gating is disabled for the system bus interface.
• BXKBEN: Boundary X Kilo byte Enable
0: The 1 Kbyte boundary is used.
1: The controller does not meet the AHB specification.
26
25
24
–
–
–
18
17
16
–
–
–
10
9
8
–
–
BXKBEN
2
CGDISFIFO
1
CGDISPIPE
0
CGDISREG
SAMA5D4 Series [DATASHEET]
Atmel-11238A-ATARM-SAMA5D4-Datasheet_30-Sep-14
599