SAMA5D43_14 Datasheet, PDF (347/1776 Pages) ATMEL Corporation – Atmel | SMART ARM-based Embedded MPU

Figure 28-9. Non-secure PIO Interrupt Management
MATRIX_SPSELRx[PIO_ID]⁽¹⁾ == 1 (PIO in Non-Secure mode)
PIO_ISR[0]
PIO_IER[0]
PIO_IMR[0]
PIO_IDR[0]
PIO_ISR[31]
PIO_IER[31]
PIO_IMR[31]
PIO_IDR[31]
(Up to 32 possible inputs)
Non-Secure
PIO Interrupt
Secure
PIO Interrupt
GND
Note: 1. Refer to the MATRIX User Interface.
28.5.12 Programmable I/O Drive
It is possible to configure the I/O drive for pads PA0 to PA31. Refer to the section “Electrical Characteristics”.
28.5.13 Programmable Schmitt Trigger
It is possible to configure each input for the Schmitt trigger. By default the Schmitt trigger is active. Disabling the
Schmitt trigger is requested when using the QTouch^® Library.
SAMA5D4 Series [DATASHEET]
Atmel-11238A-ATARM-SAMA5D4-Datasheet_30-Sep-14
347