EF4442 Datasheet, PDF (20/21 Pages) ATMEL Corporation – ARINC 429 Multi-channel Buffer Receiver (RTA) (N Channel, Silicon Gate)

Ordering Information
Table 11. Hi-REL Product
Commercial Atmel
Part-Number
Norms
EF4442CMG/BZ63
NFC 96883
EF4442CMB/TZ63
According to MIL-STD-883
EF4442PVZ63
Atmel Standard
Package
DIL 28 Side Brazed
DIL 28 Side Brazed
DIP 28
Temperature Range
Tc (C)
-55/ +125
-55/ +125
-40/ +85
Class
G
B
Drawing
Number
Data sheet
Data sheet
Data sheet
Annexe 1: EF4442 ARINC Controller/Bug Description:
Condition of Validity for the Access Time in A mode (Tacc) of EF4442 Status Register at
High Temperature (T_CASE ³ 85°C).
Description
In a particular condition described here after, the access time (Tacc) of EF4442 status
register is above the maximum value specified in Table 8.
Conditions
The defect appears for high temperature 85°C and +125°C.
When the R_TA starts a new transmission in A mode, the S7 bit of the status register is
set to 1 after 4 transmit clock periods. If this S7 bit is read before it has risen to 1 (i.e. S7
= 0), then the first access time (Tacc) for S7 = 1 will be longer than the specification:
• maximum value up to 400 ns for military range part number (M),
• maximum value up to 330 ns for industrial range part number (V).
If a second read is performed to the S7 bit, the access time (Tacc) will be compliant with
the specification (max value = 300 ns).
Workaround 1
After a new transmission start in A mode (bit C5 of control register = 1), the status regis-
ter does not have to be read before the S7 bit is set to 1. In that case the access time
would be correct.
Workaround 2
Perform two successive read access to the Status register. The second access time
would be correct.
20 EF4442
2112A–HIREL–11/02