EF4442 Datasheet, PDF (11/21 Pages) ATMEL Corporation – ARINC 429 Multi-channel Buffer Receiver (RTA) (N Channel, Silicon Gate)

EF4442
The total thermal resistance of a package (q_JA) can be separated into two components,
q_JC and q_CA, representing the barrier to heat flow from the semiconductor junction to the
package (case), surface (q_JC) and from the case to the outside ambient (q_CA). These
terms are related by the equation:
q_JA = q_JC + q_CA
(4)
q_JC is device related and cannot be influenced by the user. However, q_CA is user depen-
dent and can be minimized by such thermal management techniques as heat sinks,
ambient air cooling and thermal convection. Thus, good thermal management on the
part of the user can significantly reduce q_CA so that q_JA approximately equals q_JC. Substi-
tution of q_JC for q_JA in equation (1) will result in a lower semiconductor junction
temperature.
Table 6. Recommended Static Operating Conditions
Symbol
Parameter
Min
Max
Unit
V_IH
Input High Voltage
V_IL
Input Low Voltage
V_CC
Supply Voltage
2.0
5.25
V
-0.3
0.8
V
4.75
5.25
V
Table 7. Static Characteristics
(V_CC = 5.0V ± 5%; V_SS = 0V; -55°C < TC < + 125°C)
Symbol
Characteristics
V_IH
Input high voltage (except MODE, IRQ/V)
V_IL
Input low voltage (except MODE, IRQ/V)
I_in
Input state leakage current (except MODE, IRQ/V)
(V_IN = 0.4 to 5.25V)
I_TSI
Three state leakage current N0-N1, D0-D7
(V_IN = 0.4 to 2.4V)
V_OH
Output high voltage
(I_Load = -250 µA) N0-N1, D0-D7
(I_Load = +10 µA) IRQ/V
V_OL
Output high voltage
(I_Load = 1.6 mA) N0-N1, D0-D7
(I_Load = 3.2 mA) IRQ/V
C_in
Capacitance
(V_in= 0, TC = 25°C, f = 1 MHz)
(except MODE, IRQ/V)
R_H
External high programming impedance
MODE, IRQ/V, (C_load £ 20pF)
Scan frequency = f clock: 8)
R_L
External low programming impedance
Mode, IRQ/V (C_load £ 20 pF)
Scan frequency = f clock: 8)
Min
Typ
Max
Unit
2.2
V_CC
V
-0.3
0.8
V
-10
µA
-10
10
µA
2.4
V_CC
V
2.4
V_CC
0.4
V
10
pF
10 K
W
10
W
11
2112A–HIREL–11/02