EF4442 Datasheet, PDF (2/21 Pages) ATMEL Corporation – ARINC 429 Multi-channel Buffer Receiver (RTA) (N Channel, Silicon Gate)

Figure 1. Block Diagram
H0 L0
H1 L1
H2 L2
H3 L3
N0 N1
INH
Channel 0
HR
Shift register
32 bits
Channel 1
Channel 2
Channel 3
Counter N0, N1
Shift register
32 bits
8
24
Comparator Buffer
8 bits
24 bits
8
8
24
Label
8
8
HE
:n
8
32
DEMUX 1 -> 3
8
8
Synchro
enable
:8
Control
8
24
MUX 3 -> 1
6
8
88
Buffer
Control
register
Status
MODE CS RW/INH A0 A1 IRQ/V
VSS VCC _{D0 D1 D2 D3 D4 D5 D6 D7}
Table 1. Pin Description
Name
Number Description
V_SS
RW/INH
This pin is connected to the negative side of the power supply (ground).
This input selects the direction of transfer (write or read) of data between the circuit and the microprocessor when the
circuit is programmed in mode A (cf. Pin 28).
In B mode, this input is used to disable the channel scanning divide by 4 counter. In A mode, this output has a transmit
function. The signal corresponding to the result of ANDing.
N0
In A mode, this output has a transmit function. The signal corresponding to the result of ANDing the ARINC transmit
clock and the complemented output signal of the transmit shift register (logic “0” clock output) is available on this pin.
In B mode, the value of the least significant bit of the address of the scanned channel is available on this pin.
N1
In A mode, this output has a transmit function. The signal corresponding to the result of ANDing the ARINC transmit
clock and the output signal of the transmit shift register (logic “1” clock available on this pin).
In B mode, the value of the least significant bit of the address of the scanned channel is available on this pin.
CS
In A mode, this input (active when low) selects the chip for a microprocessor access.
A0
In A mode, this input corresponds to the most significant bit of the circuit function address.
In B mode, this input corresponds to the least significant bit of the address of the data byte in the message.
A1
In A mode, this input corresponds to the most significant bit of the circuit function address.
In B mode, this input corresponds to the most significant bit of the address of the data byte in the message.
RESET This input (active when low) initializes the circuit by resetting some registers.
2 EF4442
2112A–HIREL–11/02